Pad Cratering Under BGAs on PCBs

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The conversion to lead free Ball Grid Array (BGA) packages has raised several new assembly and reliability issues. One reliability concern becoming more prevalent is the increased propensity for pad cratering on Printed Circuit Boards (PCBs).

Lead-free solder joints are stiffer than tin-lead solder joints, and lead-free compatible (Phenolic-cured) PCB dielectric materials are more brittle than the FR4 (dicy-cured) PCB materials typically used for eutectic assembly processes. These two factors, coupled with the higher peak reflow temperatures used for lead-free assemblies, could transfer more strain to the PCB dielectric structure, causing a cohesive failure underneath the BGA corner pads.

The likelihood of pad cratering occurring in any given assembly depends on several factors including, but not limited to, the BGA package size, construction and surface finish; and the PCB pad size, material and surface finish. Standard assembly level bend, shock and drop tests can be used to determine if the entire assembly can survive a given strain and strain-rate range without having any failures.

However, with these standard assembly-level tests, it is difficult to determine if the failures occurred due to an unusually weak PCB dielectric/PCB pad size or a stiffer BGA package. It is critical to have a standardized test method that can be used to characterize and rank-order different PCB dielectric materials and PCB pad sizes.

In this study, an easy-to-implement test method to quantify the propensity for pad cratering in different PCB materials is presented. Gage repeatability and reproducibility studies to fully develop the test method were performed. Several different design variables, such as PCB material, resin content, solder alloy, number of reflows, pad size and shape were studied with a range of material sets. The test method was refined to develop a comparative metric that can be used to rank-order different PCB materials and pad size combinations.


Mechanical bend and shock tests are routinely performed on surface mount BGA assemblies to ensure that they can sustain anticipated production, handling and end use conditions. The strains and strain rates applied to BGA assemblies during bend and shock testing can lead to a variety of failure modes in the vicinity of the BGA solder joints. Figure 1 shows the failure modes that are known to occur in assemblies subjected to mechanical loading conditions.

The prevalence and distribution of these failure modes depend on several factors, including the solder metallurgy used, the package type, construction, component-to-PCB pad size ratio and PCB materials. Usually, multiple failure modes occur concurrently, at different strain and strain rate levels.


Figure 1: Different Failure Modes Occurring in a Printed Circuit Board Assembly.

To mitigate the failure modes occurring at marginal strain levels, it is helpful to decouple the failure modes and identify the weakest link in the assembly. Unfortunately, failure modes cannot be easily differentiated in high speed monotonic bend tests, where the test duration is fairly short and failures occur in rapid succession.

In shock testing, the entire assembly is subjected to incremental G-levels and gross failures are detected only if a change in strain level or electrical resistance is detected. The test is not typically performed to failure.

An example of a pad cratering failure mode is shown in Figure 2 as failure type "G." Several factors could play a role in the increased prevalence of this failure mode for Pb-free assemblies at lower strain levels than in SnPb assemblies. These include:

a. Pb-free solders are general stiffer than SnPb solders. Consequently, they can transfer more of the applied global strain to the PCB.

b. Phenolic-cured PCB materials typically used in Pb-free assemblies are more brittle than conventional dicy-cured FR4 materials.

c. The higher reflow temperatures to which Pb-free assemblies are subjected could lead to higher residual strains in the assembly.


Figure 2: Example of a Pad Cratering Failure.

Clearly, to mitigate this failure mode at marginally low strain levels, it is critical to determine the impact of each of the following contributing factors independently: the solder materials, the PCB materials and the reflow conditions.

One way to decouple and quantify the effect of the Pb-free solder joints relative to the PCB is to develop a test method that can quantitatively measure and compare the effects of different PCB materials and design variables alone.

Such a test method, used in conjunction with the standard monotonic bend and shock tests can help to:

a. Compare the relative strengths of different PCB materials and PCB pad design variables.

b. Improve PCB materials, stack-up and design variables to better withstand desired strains and strain rates.

c. Quantify the precise impact of the stiffer Pb-free solder joints on the propensity for pad cratering.

d. Provide a consistent, comparable test method for checking pad cratering susceptibility of a suspect PCB against known "good" baseline PCB data, for failure analysis purposes.

In this study, a relatively easy-to-implement test method is presented, along with calibration and test results comparing a broad spectrum of PCB variables. Different dielectric materials and pad sizes were evaluated to develop a comparative metric that can be used to rank-order different PCB material/pad size combinations. The effects of multiple reflows, PCB metallurgy and additional PCB attributes were also studied.

Test Method

The essential idea of the test method is to apply a pull force on the bare PCB pad, without a complete solder ball, and determine the force required to pull the pad from the PCB. If the test can be performed repeatably, the pull force required to induce a cohesive failure in the dielectric under the BGA pads, resulting in pad cratering can be characterized. The pull force can then be used as a quantitative metric to compare different PCB materials and pad configurations. A schematic of the test set up is illustrated in Figure 3.


Figure 3: Test Setup Schematic.

A Dage 4000 (from Dage Precision Industries, UK) fitted with a hot pin pull cartridge was used for the evaluation test. The edges of the PCB were constrained in a fixture in the setup.

One significant difference from Phase 1 of the study [5, 6] was that rather than manually applying solder to the pad, solder paste was printed using a specifically designed 5 mil stencil, and reflowed in a standard production oven. This allowed much better control in solder volume and consistency in joint formation. Stencil printing also ensured that the volume of solder deposited was a controlled function of each distinct pad size. The larger the pad, the more the solder deposited. The stencil aperture was set equal to the pad wetting area.

Some samples were also pre-conditioned with a 6X reflow simulation at either a 245C or 260C peak temperature to study the effect of higher Pb-free assembly temperatures on pad cratering potential. For these samples, solder paste was applied on the final reflow pass.

Pull speed, pull angle, pull temperature, and pin diameter were held constant during this most recent phase of testing, and were set at the previously determined optimum conditions (5mm/sec, 90 degrees, room temperature, 500 um, respectively). [5, 6]

Using the Dage 4000, the solder was heated above liquidus while a copper pin was carefully inserted and aligned for proper solder joint formation. Once a solder joint was adequately formed, heat was removed from the local site and cooled to approximately room temperature. Once cooled, the pin was pulled and the peak force on the pin recorded. This was repeated for a variety of design variables and PCB materials.

The standard Dage 4000 was used instead of the high speed version because strain rate dependency is typically only expected in bulk solder materials. Since the objective of this study is to characterize cohesive failures within the PCB dielectric using a minimal amount of solder, strain rate dependency would not be expected to play a critical role. Further studies to validate this premise are currently underway.

Design Of Experiments Test Matrix

Coupons specifically designed to test different PCB pad sizes were designed and fabricated. A schematic of the test coupon is shown in Figure 4.


Figure 4: PCB Test Coupon (125 mil thick, 7 pad sizes, 2 pad geometries).

A test matrix to vary the different design variables was established as shown in Table 1. Five pull measurements were performed for each test split, to generate statistically significant data. The sample size of 5 was selected based on the standard deviations and pull forces obtained from Phase 1 of the study [3] (Figure 5). A total of 240 measurements were taken in this most recent phase of testing.


Figure 5: Sample Size and Power Based on Phase 1 Study.

Gage Repeatability and Reproducibility

A Gage Repeatability and Reproducibility (R&R) study was performed on the method parameters, specifically pull force, speed and heating temperature during the previous phase of test development [6]. The critical variables: heating temperature, pull speed and pull force were studied in both comparative and absolute terms. The results indicated that while the absolute force values were off, the relative values were quite consistent and repeatable.

Consequently, the test could still be used to compare and rank order different PCB design variables, but the absolute values would need to be verified and calibrated. This has implications when pull strength is correlated with absolute bend and shock test results and finite element analysis is performed to model pad cratering. [6]


Experimental Results

Having completed extensive Gage R&R evaluations and developing precise correlations, two rounds of testing were then performed. The first of these phases was documented in previous publications [5, 6]--optimizing pull testing method parameters as well as quantifying effects of specific PCB attributes on pull force values on two PCB material types. This latest phase of testing studied the effects of additional PCB material types, resin content/glass styles, and pad geometries.

Since the results span so many variables, plotting the data across so many different variables in separate plots would be confusing and lengthy. Consequently, all the experimental data points generated and each distinct variable comparison is presented in a separate subsection.

Effect of PCB Material

As shown in previous test results [5, 6], the pull strength associated with pad cratering, of the High Tg filled Phenolic-cured material (HTFP) is about half that of the High Tg Dicy-cured material (HTD) (all other variables the same). This trend is consistent with other published literature. [3, 4]

In this latest phase, additional PCB material types were evaluated for further material granularity:

a. High-Tg Dicy-cured material (HTD)

b. High Tg Un-filled Phenolic-cured material (HTUP)

c. High Tg Filled Phenolic-cured material (HTFP)

d. High Tg Mid-range-Df Modified-Epoxy material (HTMP)

e. High Tg Low-Df Modified-PPO material (HTLP)

Again, the results confirm previous results--showing that the High Tg Dicy-cured material (HTD) exhibits much higher pad cratering pull forces versus the High Tg Filled Phenolic-cured material (HFTP). With additional material types added in this latest data set, we are now able to compare a variety of materials in terms of pull force.



Figure 6: Effect of PCB Material - pad geometry (20 mil round), solder alloy (SAC), pre-conditioning (as-is) and resin content (high) kept constant.

The results in Figure 6 indicate the following rank ordering in terms of average pull force associated with pad cratering from highest to lowest:

1. High Tg Dicy-cured material (HTD) and High Tg Un-filled Phenolic-cured material (HTUP) (difference between them is statistically insignificant)

2. High Tg Mid-range-Df Modified-Epoxy material (HTMP) > High Tg Low-Df Modified-PPO material (HTLP) > High Tg Filled Phenolic-cured material (HTFP). The difference between HTMP and HTUP is statistically insignificant. Similarly, the difference between HTLP and HTFP is also statistically insignificant.


As PCB laminates are modified from a standard High Tg Dicy-cured material (HTD) to be more thermally resistant (e.g. by adding fillers, utilizing different resin types, etc), the modulus decreases and materials become more brittle in nature. This decreased flexural strength may translate to higher Thermal Decomposition Temperatures (Td), but also exhibits lower pull forces, and ultimately a higher propensity for pad cratering (Table 2). Therefore finding a material set that meets both increased thermal performance and pad cratering resistance is difficult to achieve.

Effect of Multiple Reflows

Multiple reflows are thought to be potential sources of material degradation, which could result in even lower pad pull forces for certain materials that are more sensitive to multiple reflows. In previous testing [6], High Tg Dicy-cured (HTD) and High Tg Filled Phenolic-cured (HTFP) materials were subjected to 6X reflows at 260C peak temperature, and in the last reflow step, solder paste printed on them, and pull testing performed (Figure 7).


The previous results [6] indicated that while the pull strength of the High Tg Dicy-cured (HTD) material degrades with multiple reflows, the pull strength of the High Tg Filled Phenolic-cured (HTFP) material does not degrade significantly with multiple reflows. The variation was within the standard deviation of the test method. Consequently, while the baseline pull strength of HTFP is almost 2X lower than that of HTD, the change in pull strength over multiple reflows is less significant with the Phenolic-cured material. Comparing the differences between SnPb and Pb-free solders, the SnPb solders in combination with Phenolic-cured materials gave the lowest pull strength. However, the effect of solder metallurgy was secondary.

In this latest phase of testing, additional materials were added for further comparison and subjected to as-is, 6X reflow at 245C peak temperature, or 6X reflow at 260C peak temperature (Figure 8).


Figure 8: Effect of Multiple Reflows on Various PCB Material Types - pad geometry (20 mil round), solder alloy (SAC), pre-conditioning (as-is) and resin content (high) kept constant.

As shown in Figure 8, the effect of multiple reflows on the PCB material was found to be statistically insignificant in relation to pull force results, except for the HTD material. However, for the HTD material, the pull force values after reflow were comparable to the other materials. All of the materials tested have previously shown the ability to withstand a 6X reflow at 260C peak temperature reflow without exhibiting delamination (with the exception of the HTD material), so it appears that the functional life of the material is not degraded enough to affect pull force at this point. However, testing was not run beyond 6X reflow passes, and pull forces may or may not be affected by subsequent processing.

Effect of Resin Content/Glass Style

Since pad cratering occurs in the layer 1-2 dielectric opening--initializing in the resin with possible propagation along the glass bundles--the effect of resin content/glass styles was included as a variable in this round of testing. One variation was a 2-ply, 66-76% resin content with 106, 1067, or 1035 glass styles (dependent on material type availability); the other dielectric construction was a single-ply, 54-59% resin content 2113 or 3313 glass styles. All five material types were tested with both constructions.

In general, for a single material type, the results show no statistically significant difference in pull force values when varying the layer 1-2 dielectric construction from a "low" to "high" resin content. However, when separating out the effect of resin content for each material type separately, it shows that resin content is indeed a significant factor for the HTMP and HTUP material types. (Figure 9) For the HTMP and HTUP material types, the higher the resin content, the higher the pull force.

Another point of interest, but outside of the scope of this study, is the effect of location of PCB pad relative to the underlying glass bundle (e.g. at either a resin rich area or directly above a glass bundle).


Figure 9: Effect of Resin Content/Glass Style by Material Type - pad geometry (20 mil round), solder alloy (SAC) and pre-conditioning (as-is) kept constant.

Effect of Pad Size

The effect of the PCB pad size was observed in previous studies to be very critical to the pull force of a PCB material, and is directly related to the propensity for pad cratering. However, when the pull force is normalized with pad size, it is observed that the effective pull strength (force per unit area) is quite constant as long as the pin diameter is larger than the pad size (Table 3). [6]

It is also important to note that the nominal PCB pad size could vary significantly. Measurement of the actual pad size (as opposed to assuming the nominal pad size) is recommended. The same is also true in measuring the solderable pad area on those pads that are soldermask defined. Table 3 shows pad size pull force data from previous testing. [6]

ScreenShot013.jpgWhen the pad size exceeds the pin (≥20 mils), the strength values become more varied. It is interesting to note that the pull force increases with pad size almost linearly. This trend can be effectively used to mitigate pad cratering.

In the most recent phase of testing, two pad sizes were tested--20 and 24 mils--to minimize sample size, yet still illustrate the effect of pad size on pull force across multiple materials and additional PCB attribute variables. Similar to previous testing, as the pad size is increased from 20 to 24 mils, the pull force increased. (Figure 10)


Figure 10: Effect of Pad Size - pad geometry (round), solder alloy (SAC), resin content (high), pre-conditioning (as-is) kept constant.

Therefore, if the corner-most BGA solder joints are made soldermask defined, and the pad size increased from 16 mils to 20 mils, the effective force-needed-to-cause pad cratering could be increased by 40%. Additionally, if the pad size was increased from 20 mils to 24 mils, the pull force could be increased between 0% and 40%, depending on material type. This design rule could be used effectively in circuit board design to mitigate pad cratering and offset the reduction in PCB strength between Phenolic-cured materials and dicy-cured materials. However, if the pad size is increased excessively, the failure mode could shift elsewhere, from pad cratering to brittle fracture in the solder joint.

The 20 mil pads tested were non-soldermask-defined, whereas the 24 mil pads were soldermask-defined with a soldermask opening of 20 mils. In previous testing, the effect of soldermask definition was determined to not play a significant factor. [3, 5, 6]

Effect of Pad Geometry

Both round and square pads were studied in their effect on pull force--to verify if adding a square feature would provide additional "anchoring" effects by the corners. However, as seen in Figure 11, pad geometry did not play a significant factor in pull force.


Figure 11: Effect of Pad Geometry - solder alloy (SAC), resin content (high), pre-conditioning (as-is) and pad size (24 mils) kept constant.

Failure Modes

The failure mode of every pull test performed was catalogued and categorized. There were 3 main categories of failure modes observed: (a) complete pad cratering, (b) fracture in the bulk solder joint and (c) a mix of failure in the PCB and the solder joints.

After the test method was calibrated and standardized, the vast majority (91.5%) of the total failures (282 distinct failures) were due to pad cratering. The small percentage of bulk solder (8.5%) failures was only observed in the splits which have been demonstrated as suboptimal. No hybrid failures (partially in laminate, partially in solder) were observed during this round of testing. Some example images of the failure modes observed are shown in Figure 12 below.

The results in Figure 12 indicate that the nature of the failure mode is distinctly different between HTD and HTFP materials. For the HTD material, pad cratering reveals the glass fibers underneath, whereas for the HTFP material, the failure in the dielectric material does not go all the down into the glass fibers. This also suggests that the HTFP material is more brittle than the HTD material, as shown by the pad pull testing results.


Conclusions and Future Work

An easy to implement test method for characterizing pad cratering has been presented. This test method can be used in conjunction with the standard bend and shock tests to evaluate and improve the robustness of printed circuit board assemblies. Based on the study results, the key variables analyzed are rank ordered in the summary table below. New variables from the most recent study have been added and are highlighted in bold print (Table 4).

A complete plot of all the most recent test results and standard deviations is shown in Figure 13. It is important to note that granularity of the test method is limited by the standard deviations for the given sample sizes. The test method appears to be able to detect differences in pull force values with a standard deviation range of about 100-500 grams. It is quite possible that other critical variables impacting pull force/pad cratering may not be detectable if they fall below the minimum granularity of the test method.


From the variables identified, the effect of PCB material and pad size have been identified as giving the most change in pull force. Thus, this test method can be used to rank order and compare different design variables within a detectable degree of granularity, and help produce improvements in pad cratering strength with the critical variables identified.


Figure 13: Results and Standard Deviations of all Test Splits.


The authors would like to thank Stephen Clark and Evstatin Krastev of Dage Precision Industries Inc. for their help in generating the experimental data. The authors would also like to thank John Radman and Renee Michalkiewicz of Trace Laboratories for their invaluable help on the failure analysis; and David Towne, Mason Hu, David Senk and Kuo-Chuan Liu for their invaluable insights. Finally, the feedback and contributions provided by members and management of the Component Quality and Technology Group at Cisco Systems, Inc. are gratefully acknowledged.


[1]. M. Mukadam, G. Long, P. Butler, and V. Vasudevan, "Impact Of Cracking Beneath Solder Pads In Printed Circuit Boards On Reliability Of Ball Grid Array Packages", SMTA International, 2005.

[2]. Ray Prasad, "Part 2: DfM in a Lead-free World", Surface Mount Technology, SMT® Magazine, January 2007.{}

[3]. Ahmad M., Senk D., Burlingame J., "Methodology To Characterize Pad Cratering Under Bga Pads In Printed Circuit Boards", Pan Pacific Microelectronics Symposium, Kauai, HI, 2008.

[4]. Roggeman et. al, "Assessment of PCB Pad Cratering Resistance by Joint Level Testing", Electronics Components and Technology Conference, 2008, pp. 884 - 892.

[5]. Ahmad M., Senk D., Burlingame J., "Methodology To Characterize Pad Cratering Under Bga Pads In Printed Circuit Boards", Pan Pacific Microelectronics Symposium, Kauai, HI, 2008.

[6]. Ahmad M., Burlingame J., Guirguis C., "Comprehensive Methodology To Characterize And Mitigate BGA Pad Cratering In Printed Circuit Boards", Journal of SMTA, January 2009.

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