-
- News
- Books
Featured Books
- smt007 Magazine
Latest Issues
Current IssueComing to Terms With AI
In this issue, we examine the profound effect artificial intelligence and machine learning are having on manufacturing and business processes. We follow technology, innovation, and money as automation becomes the new key indicator of growth in our industry.
Box Build
One trend is to add box build and final assembly to your product offering. In this issue, we explore the opportunities and risks of adding system assembly to your service portfolio.
IPC APEX EXPO 2024 Pre-show
This month’s issue devotes its pages to a comprehensive preview of the IPC APEX EXPO 2024 event. Whether your role is technical or business, if you're new-to-the-industry or seasoned veteran, you'll find value throughout this program.
- Articles
- Columns
Search Console
- Links
- Events
||| MENU - smt007 Magazine
Via-in-Pad Plated over Design Considerations to Mitigate Solder Separation Failure
November 29, 2017 | S.Y. Teng, P. Peretta and P. Ton, Cisco Systems Inc.; and V. Kome-ong and W. Kamanee, Celestica ThailandEstimated reading time: 6 minutes
As signal speeds and performance requirements continue to rise, the use of advanced PCB technologies is becoming increasingly important. As a result, the via-in-pad plated over (VIPPO) structure has been adopted in many BGA footprint designs within the PCB. These VIPPO structures are preferred over the more traditional dog-bone pad structure in order to shrink signal path lengths, reducing two parasitic effects, capacitance and inductance, for improved highspeed performance.
Figure 1 illustrates how the VIPPO structure can influence those parasitic effects. The signal traces, which connect the BGA pads with the vias, act as inductors. Additionally, as high-speed designs typically have ground planes immediately below the outer layer, there is also a capacitive effect that is generated. With the VIPPO structure, the outer trace layer is eliminated, thereby cancelling both parasitic effects.
Figure 1: Dog-bone vs. VIPPO pad structure.
Figure 2 exhibits the VIPPO structure as compared with the VIPPO + backdrill (BD) structure. The use of backdrill with the VIPPO structure can eliminate the reflections within the unused portion of the via, which acts as a stub. The portion of the via indicated by the purple arrow is not in series with the signal path, but instead acts as a stub. Therefore, a portion of the signal is reflected back, creating an interference, which will degrade the high-speed signal performance. Hence, the purpose of the back-drill is to remove this “unused” portion of the via in order to eliminate the reflections for a cleaner signal.
Figure 2: VIPPO vs. VIPPO + backdrill structure.
With increased complexity of PCB designs for high-end networking products, the boards thicknesses are typically >120 mils and signal speeds are reaching 25 GHz and beyond. For these types of designs, backdrilling of the VIPPO structures becomes imperative.
It is also a common practice to mix VIPPO and non-VIPPO pad structures within a single BGA footprint, as indicated in Figure 3. The green lines indicate a high-speed signal trace (e.g., for differential pairs) on the outer layer. It is preferable from a signal integrity perspective, to route these signal lines on the outer layers of the PCB to take advantage of microstrip routing which has faster propagation speeds than stripline routing. Hence, these BGA pads do not require the use of VIPPO. These non-VIPPO pads are highlighted in red. Without any VIPPO structure, a zero stub length can be achieved, which is an extremely attractive option for the signal integrity engineer. Moreover, additional routing space is gained underneath the non-VIPPO pad. Unfortunately, these types of mixed footprint designs have a propensity for manufacturing defects during SMT assembly of BGA packages and can potentially expose the PCBA to field reliability risks if these defects escape manufacturing tests.
Figure 3: Mixed VIPPO/Non-VIPPO BGA Footprint.
Failure Mode and History
As a consequence of these advanced PCB technologies and complex board designs, a unique BGA solder joint failure mode has emerged during specific assembly conditions. This failure mode occurs when the bulk solder separates from the IMC during or just prior to reflow. This failure mode is of particular concern because the discontinuity is so small relative to the size of the solder joint itself that it cannot be detected via X-ray inspection methodologies. Furthermore, in many cases it is only a partial separation of the BGA solder joint and hence, it may not even be detected via ICT or functional test techniques. Without a robust methodology to screen for these defects, this presents an extremely high risk for potential escapes to the field.
Typically, this failure mode has been found on BGA packages with a 1 mm pitch or less BGA array and having a PCB footprint that includes a mixed VIPPO/non-VIPPO pad design. The solder separation occurs when the component is subjected to a secondary reflow, either during top-side SMT for bottom-side components or during rework of an adjacent, or mirrored, BGA component. Since the open occurs between the bulk solder and the IMC, it does not have the typical brittle solder joint fracture signature, which has a flat fracture interface through the IMC as shown in Figure 4. Instead, this failure mode exhibits more of a hot solder tear or separation type of failure mode, as the solder separates from the IMC leaving it intact.
Figure 4: Example of brittle fracture.
Figures 5 and 6 illustrate examples of both partial and complete solder separations. For these failures, the solder separation only occurs on the solder joints that use a VIPPO BGA pad and is typically adjacent to a solder joint(s) with a non-VIPPO BGA pad. In some cases, this type of failure mode has also been identified on a component having a full VIPPO BGA pad pattern on the PCB when there is also a pattern of VIPPO with deep backdrill (BD) within the footprint. Hence, the deep-backdrill VIPPO structures seem to mimic the behavior of the non-VIPPO pads so that it becomes comparable to a mixed VIPPO/non-VIPPO BGA pad footprint and again, induces solder separation in the solder joints on a VIPPO pad when subjected to a secondary reflow.
Page 1 of 2
Suggested Items
Indium Experts to Present at Electronics in Harsh Environments SMTA Conference
05/13/2024 | Indium Corporationndium Corporation Technical Manager for Europe, Africa, and the Middle East, Karthik Vijay, will deliver a technical presentation and Indium Corporation Senior Technologist, Dr. Ronald Lasky, will deliver both a workshop and technical presentation at the Electronics in Harsh Environments SMTA Conference on May 14-16 in Copenhagen, Denmark.
Connect the Dots: Designing for Reality—The Pre-Manufacturing Process
05/08/2024 | Matt Stevenson -- Column: Connect the DotsI have been working with Nolan Johnson on a podcast series about designing PCBs for the reality of manufacturing. By sharing lessons learned over a long career in the PCB industry, we hope to shorten learning curves and help designers produce better boards with less hassle and rework. Episode 2 deals with the electronic pre-manufacturing process. Moving from CAD (computer-aided design) to CAM (computer-aided manufacturing) is a key step in PCB manufacturing. CAM turns digital designs into instructions that machines can use to actually build the PCB.
AIM Solder Signs Shinil Fl Ltd. as New Distributor for Korea
05/08/2024 | AIM SolderAIM Solder, a leading global manufacturer of solder assembly materials for the electronics industry, is pleased to announce a new distribution partnership with Shinil Fl Ltd., a prominent supplier of technological solutions in the SMT and semiconductor sectors.
Indium Corporation to Showcase HIA Materials at ECTC
05/07/2024 | Indium CorporationAs an industry leader in innovative materials solutions for semiconductor packaging and assembly, Indium Corporation® will feature its advanced products designed to meet the evolving challenges of heterogeneous integration and assembly (HIA) and fine-pitch system-in-package (SiP) applications at the 74th Electronic Components and Technology Conference (ECTC), May 28‒31, in Denver, Colorado.
Indium Corporation Expert to Present on Pb-Free Solder for Die-Attach in Discrete Power Applications
04/30/2024 | Indium CorporationIndium Corporation Product Manager – Semiconductor Dean Payne will present at the Advanced Packaging for Power Electronics conference, hosted by IMAPS, held May 8-9 in Woburn, Massachusetts, USA.